Intel may have plans to introduce Xeon processors for 2-way applications with 1066MHz bus next year and already discusses chipsets with support for such PSB with certain partners, The Register web-site reports.
Later this year Intel is expected to unveil Xeon processors with 1MB L2 cache, Enhanced Memory 64 Technology, 800MHz Quad Pumped Bus as well as appropriate chipsets code-named Lindenhurst (E7320, E7520) and Tumwater (E7525) to support the launch. Next year Intel is likely to commercially unveil Xeon processors with 1066MHz processor system bus with appropriate chipsets code-named Blackford and Greencreek, The Register quotes a presentation from Intel"s Tommy Rydendahl. The timeframe for the new core-logic sets introduction is described as mid-2005 or beyond.