Taiwan Semiconductor Manufacturing Co. Ltd. gained ground this week in its effort to standardize the industry"s advanced process technologies, disclosing a 90nm CMOS process developed with Philips Electronics N.V. and STMicroelectronics N.V.
The five-year research and development partnership is aimed at standardizing 90nm technology and a subsequent 65nm production node. The common process also will help customers trim costs and deliver products to the market faster, according to F.C. Tseng, deputy chief executive of TSMC, who said he was unable to quantify the potential savings.
The co-development project was unveiled just weeks after Shang-Yi Chiang, TSMC"s vice president of R&D, urged customers and competitors to standardize around the company"s technology.
Speaking at a recent Silicon Valley conference, Chiang said a common process technology below 0.10-micron is needed to shorten time-to-market and eliminate the time and expense of requalifying IP and design libraries for disparate production lines.
"This joint-development project is not simply an alignment of design rules," said Joel Monnier, corporate vice president and central R&D director at ST, Geneva. "Thanks to our initial collaboration on fundamental technical issues and the ongoing interchange of data, we can be sure that the processes of all three partners in this and subsequent generations will be fully compatible."
TSMC, Hsinchu, Taiwan, and its allies, ST and Philips, are mainly targeting advanced system-on-a-chip (SoC) process technology. The 90nm process will be used in segments such as PCs, communications, and consumer electronics, and particularly convergence products such as 3G and 4G handsets and other mobile multimedia devices.