THE MOST OFTEN cited aspect of the competition between Intel Xeon and AMD Opteron is the extra 64-bitness of the AMD platform, at a price competitive with the Xeons. Fine, yes, Opteron extends the X86 architecture to true 64-bit level in a reasonably elegant manner, knowing all the quirks of the 20 yeards old platform and its zillion patch-ups over time. And it still keeps full native 32-bit performance along the way.
But what about something that is equally important in both 32-bit and 64-bit scenarios? The memory and I/O hierarchy? Is there a genuine threat for Xeon there, and does the launch of 1 MB L3 cache XeonDP surprise us then? If you look within the CPUs, "Prestonia" Xeon has 512K L2 cache coupled with 16 KB L1 data cache plus trace cache, just like its mirror image, the Northwood Pentium 4. Opteron has a larger 1 MB cache, coupled with 2 x 64 KB L1 caches.
Outside the CPU, current XeonDP processors rely on a 533 MHz (133 MHz quad-pumped) shared FSB, while quad-capable XeonMP processors use an even slower 400 MHz (100 MHz quad-pumped) FSB. In the first case, you get 4.26 GB/s of theoretical FSB bandwidth shared between two CPUs, while in the other case, you have only 3.2 GB/s of theoretical FSB bandwidth shared between four hungry processors! Contention and congestion are two obvious words that come to mind, especially in memory hungry server and workstation applications.