Cadence's latest Palladium and Protium "dynamic duo" to offer 2X capacity and 1.5X gains

Cadence has unveiled its latest Palladium Z2 and Protium X2 systems which claim to offer twice the capacity and 1.5X the performance over the last-gen Z1 and X1 systems. For those who don't know, the company provides framework and tool-set for various hardware and software companies to do large-scale testing and validation of products before they are sent off for fabrication. The Palladium and Protium lineup from Cadence, dubbed the "dynamic duo" by the company, provides pre-silicon hardware debugging and pre-silicon software validation, respectively, for hardware companies like Nvidia or AMD, and is part of the Cadence Verification Suite of tools that it provides.

The Palladium Z2 hardware emulation systems will be based on a new unspecified "custom emulation processor", while the Protium X2 prototyping systems will utilize Xilinx's Virtex UltraScale+™ VU19P FPGAs.

The key performance aspects and features of the two systems have been listed below:

• Palladium Z2

  • 2X capacity, 1.5X performance over Palladium Z1 platform,

  • Modular compile for faster turnaround time: 10 billion gates in less than 10 hours,

  • 10X faster waveform dump and 2X debug trace depth, 2X faster memory dump and debug upload, and 3X throughput bandwidth to the host,

  • FullVision 2.0—new and improved high-performance debug engine,

  • Scalability from 8 million gates to 18.4 billion gates.

  • Code and functional coverage dump,

  • Hybrid acceleration with virtual platform,

  • Multi-power domain verification with IEEE 1801 UPF constraints,

  • Hardware verification language-based testbench acceleration,

  • Universal Verification Methodology (UVM) acceleration,

  • In-circuit emulation and acceleration,

  • Vector-based acceleration,

  • Hardware-based and post-process-based massively parallel Dynamic Power Analysis (DPA).

• Protium X2

  • 2X capacity per rack and 1.5X speed over Protium X1 platform,

  • Unified compile, testbench link, and interfaces with Palladium Z2 for quick bring-up,

  • Compiles 10 billion gates in under 24 hours,

  • 2X higher debug throughput,

  • 2X faster host-workstation connection,

  • 2X faster memory access,

  • Enhanced multi-user features,

  • In-circuit prototyping,

  • Hybrid prototyping with virtual platform,

  • Continuous at-speed data capture,

  • Early firmware development/software debug,

  • Pre-silicon software/OS development,

  • Hardware/software co-verification,

  • System integration level test.

The general availability of the new Palladium Z2 and Protium X2 systems is slated for Q2 of this year however the company says that it has already started deploying the platforms at select customers. To know more about these systems, you can visit this page on the official Candence website.