Memtest86+ v2.00

Based on the well-known original memtest86 written by Chris Brady, memtest86+ is a port by some members of the x86-secret team. Its goal is to provide an up-to-date and completely reliable version of this software tool aimed at memory failures detection. Memtest86+ is, like the original, released under the terms of the Gnu Public License (GPL). No restrictions for use, private or commercial exist other than the ones mentioned in the Gnu Public License (GPL). Texts about the original version was taken from the original website and written by Chris Brady.

Changelog:
o Major Architectures changes
o Modulo test now use random pattern for better accuracy
o Added Advanced DMI Errors Reporting Mode
o Added support for bus ratio changes on Intel Core CPU
o Added support for non-integer bus ratio on latest Intel CPU
o Added SPD Data Display for all Intel Chipsets (more to come)
o Added serial support as a linux boot parameter (Thanks to Michal S.)
o Added preliminary support for VIA CN Isaiah CPU
o Added preliminary support for Intel Nehalem
o Added support for VIA C7/C7-D/C7-M/Eden on Esther Core
o Added support for AMD K10 (Phenom) CPU w/ timings detection
o Added support for Intel Pentium E w/ 1 MB L2 Cache
o Added support for Intel Core 2 45nm (Penryn)
o Added support for FSB1333/FSB1600 Intel CPU
o Added support for Intel 5400A/5400B w/ timings detection
o Added support for Intel Q35/P35/G33/Q33 w/ timings detection
o Added support for Intel X38/X48 w/ timings detection
o Added preliminary support for Intel 5000P/V/Z
o Removed on-fly memory timings change (unstable)
o Numerous bugfixes